The minimum operational supply voltage (Vccmin) is an important parameter of today's processors. Reducing Vccmin is an effective way to reduce the power consumption of a processor. Memory cells such as those in register files (e.g., inside a processor core) are typically the limiting blocks in reducing Vccmin. With memory cells, Vccmin may the maximum of three components: write Vccmin, read Vccmin, and retention Vccmin.
FIG. 1 shows a conventional 8T register file cell. With such a cell, write Vccmin may be the worst of the three, i.e., require the highest level. The 8T (M1 to M8) cell of FIG. 1 has a memory cell formed from transistors M1-M4, write access transistors M5-M6, and read access transistors M7-M8. There is a write wordline (WWL) for turning on the write access transistors M5-M6 when data is to be written into the cell (from write bit lines WRBL, WRBL#) and a read wordline (RDWL) to turn on access transistor M8 to read the data in the cell based on whether it turns on or off access transistor M7. Also included is a word line driver 102 (formed from inverter P1/N1) to drive the write word line High or Low based on the value of its input (WLIN).
For a write operation, the write bit-lines (WRBL and WRBL#) are complementarily driven according to the data to be written into the cell. The write word-line (WWL) is then driven high so that data are written into the complementary nodes D# and D of the cell via the write pass gate transistors M5 and M6, respectively. Unfortunately, a contention issue between the pass gate transistor (M5 or M6) that is to write a ‘0’ into the cell and its associated pull-up transistor (M1 or M3, respectively) can occur, especially as the Vccmin level supplying the cell (M1, M3) goes down.
There have been several different approaches for redressing write contention issues. Dynamic VCC collapse is a write assist technique that can give write Vccmin improvement. However, at lower supply voltage levels, the magnitude and duration of the VCC collapse must generally be limited due to the retention of the unselected cells on the same column. Further, VCC-collapse techniques primarily help the write contention but may adversely affect the write completion process.
Wordline boosting is another write-assist technique that can help contention as well as the write completion process. Integrated charge pump and level shifter circuits are used to provide wordline boosting, thereby allowing for write Vccmin to be lowered. Unfortunately, charge pump and level shifting based boosting require careful design and power management in order to attain net power savings. Accordingly, new approaches may be desired.